The paper presents a new mechanism for scan test scheduling in SOC (System On Chip) designs including isolated cores. Scan patterns instead of cores’ test pattern sets are treated as scheduling objects and the channels’ idle time during scan capture period can be utilized. Solution finding under this new mechanism is modelled as a bin packing under color constraint. Sequence pairs and simulated annealing algorithm are used to find the optimal scheduling solution. Experimental results obtained for several large industrial SOC designs show the feasibility of the proposed new mechanism.