IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Design and FPGA implementation of digital pulse compression for chirp radar based on CORDIC
Zhisheng YanBiyang WenCaijun WangChong Zhang
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JOURNAL FREE ACCESS

2009 Volume 6 Issue 11 Pages 780-786

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Abstract

The paper presents a full digitized approach for the pulse compression implementation in chirp radars. The emphasis is to cancel the quadratic phase term of the echo using a coordinate rotation digital computer (CORDIC). This approach has been implemented on a field programmable gates array (FPGA) and the compressed output peak is 100dB larger than the noise.

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© 2009 by The Institute of Electronics, Information and Communication Engineers
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