IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
The design of compressed memory system for depth data in 3D rendering processors
Woo-Chan ParkDuk-Ki YoonDong-Seok KimHong-Sik KimJin-Hong ParkWoo-Nam JeongTack-Don Han
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JOURNAL FREE ACCESS

2010 Volume 7 Issue 21 Pages 1622-1628

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Abstract

We propose an effective compressed memory system to address bandwidth problem of depth data for low-power 3D rendering processors. The proposed memory system performs on-the-fly compression for depth data to be stored into external memory. If the compression rate meets or exceeds a selected threshold value, then the compressed depth data are stored into internal SRAM; otherwise the original depth data are stored into external DRAM. Experimental simulation results show that the proposed memory system could reduces the external DRAM usage by about 82%.

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© 2010 by The Institute of Electronics, Information and Communication Engineers
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