A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection

HyunJin Kim; Hyejeong Hong; Dongmyoung Baek; Jin-Ho Ahn; Sungho Kang

doi:10.1587/elex.7.377

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A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection

HyunJin Kim, Hyejeong Hong, Dongmyoung Baek, Jin-Ho Ahn, Sungho Kang

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Keywords: computer network security, deep packet inspection, finite-state machine, pattern matching engine, parallel pattern matching

JOURNAL FREE ACCESS

2010 Volume 7 Issue 5 Pages 377-382

DOI https://doi.org/10.1587/elex.7.377

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Abstract

This paper presents for hardware-based parallel pattern matching scheme that adopts heterogeneous bit-split string matchers for deep packet inspection (DPI) devices. Considering the pattern lengths, a set of target patterns is partitioned into two subsets for short and long patterns. By adopting the appropriate bit-split string matcher types for the two subsets, the memory requirements can be optimized for the bit-split parallel pattern matching engine. Experimental results show that the total memory requirements decrease by 39.40% and 20.52%, in comparison with the existing bit-split pattern matching approaches.

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