IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Elixir: A new bandwidth-constrained mapping for Networks-on-chip
Midia ReshadiAhmad KhademzadehAkram Reza
Author information
JOURNAL FREE ACCESS

2010 Volume 7 Issue 2 Pages 73-79

Details
Abstract

Nowadays, with technology shrinking and the huge demand for supporting multiple applications has led designers to use multiple IP cores within a single chip. Therefore, the designers have proposed Networks-on-chip to overcome the problems of future complex systems. Mapping IPs directly affects NoC design parameters such as latency and power consumption. In this paper we present a power and performance aware mapping technique based on the combination of both the bandwidth-constrained and branch and bound concepts. Results have shown improvements of the latency and power consumption of our technique when compared to other popular NoC mappings.

Content from these authors
© 2010 by The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top