2011 Volume 8 Issue 16 Pages 1260-1266
The latch-up immunity of high voltage power clamps used in high voltage ESD protection devices is rapidly becoming very important in high-voltage applications. The conventional high-voltage ESD devices are unsuitable for new high-voltage applications due to their low holding voltage, low ESD robustness, and their large size. In this study, a stacking structure with a high holding voltage and a high failure current is proposed and successfully verified using a 0.35um BCD (Bipolar-CMOS-DMOS) process in order to achieve the desired holding voltage and an acceptable failure current. The experiment results show that the holding voltage of the stacking structure can exceed the operational voltage found in high-voltage applications. In addition, the stacking structure can provide a high ESD robustness.