IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Preference of designing CMOS subthreshold logic circuits using uniform-size transistors
Manmit MukerMaitham Shams
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JOURNAL FREE ACCESS

2011 Volume 8 Issue 23 Pages 1983-1988

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Abstract

We demonstrate that designing subthreshold digital circuits using only similarly-sized PMOS and similarly-sized NMOS transistors usually results in faster circuits than those scaled according to conventional design methods such as Logical Effort. This statement is valid if both transistor types exhibit the inverse narrow-width effect. For proving the claim, a number of circuits are designed in both ways, compared, and the results are reported.

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© 2011 by The Institute of Electronics, Information and Communication Engineers
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