IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Dual-switch power gating revisited for small sleep energy loss and fast wake-up time in sub-45-nm nodes
Huan Minh VoChul-Moon JungEun-Sub LeeKyeong-Sik Min
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JOURNAL FREE ACCESS

2011 Volume 8 Issue 4 Pages 232-238

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Abstract

In this paper, we have compared three power gating (PG) schemes which are Single-Footer PG (SFPG), Charge-Recycled PG (CRPG), and Dual-Switch PG (DSPG), respectively, in terms of energy loss, crossover time, and wake-up time using the 45-nm Predictive Technology Model. Though the DSPG has been rarely used so far compared to the SFPG and CRPG, the comparison results tell us that the DSPG should be revisited. With the constraint of the same active speed, the DSPG shows higher energy-efficiency and faster wake-up than the others. Based on these results, the DSPG can be regarded as the most suitable PG scheme for reducing leakage and achieving fast wake-up in the future leakage-dominant VLSIs.

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© 2011 by The Institute of Electronics, Information and Communication Engineers
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