IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Simulation study on scaling limit of silicon tunneling field-effect transistor under tunneling-predominance
Seongjae ChoHyungjin KimMin-Chul SunIn Man KangByung-Gook ParkJames S. Harris, Jr.
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JOURNAL FREE ACCESS

2012 Volume 9 Issue 9 Pages 828-833

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Abstract

In this work, a strategic methodology to determine the channel length limit for the predominance of tunneling mechanism in the operation of a tunneling field-effect transistor (TFET) is suggested and validated for silicon (Si) nanowire TFET device. For quantitative analyses that can be graphitized as a function of channel length, a set of evaluating functions were defined and properly applied. Based on the suggested methodology, the upper limit for keeping the Si TFET under the tunneling-predominant operation turned out to be approximately 65nm in a nanowire structure.

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© 2012 by The Institute of Electronics, Information and Communication Engineers
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