New modulo m multipliers with a radix-two signed-digit (SD) number arithmetic is presented by using a modified Booth recoding method. To implement a modulo m multiplication, we usually generate modulo m partial products, then perform modulo m sum of them. In this paper, a new Booth recoding method is proposed to convert a radix-two SD number into a recoded SD (RSD) number in parallel. In the RSD number representation, there are no (1, 1)and (-1, -1) at any two-digit position. Thus, by using the RSD converted, the modulo m partial products can be cut from n into n/2 for an n × n modulo m multiplication. Parallel and serial modulo m multipliers have been designed by using the SD number arithmetic and the proposed Booth recoding. Compared to the former work, the area for VLSI implementation of the parallel modulo m multiplier is reduced to 80% from the original design, and the speed performance of the serial multiplier is improved up to twice by using the Booth recoding. The implementation method of the proposed Booth modulo m multipliers has been verified by a gate level simulation.