In this study, the phase change behavior of PRAM recording layer during 1 cycle operation was investigated by finite element method (FEM) simulation. The JMAK equation was used for simulation of phase change behavior of the Ge₂Sb₂Te₅ (GST) recording layer of PRAM. The RESET simulation of the PRAM unit cell of 100 nm thick recording layer model shows that the amorphous region of the recording layer was partially crystallized after RESET current was removed. This crystallization may cause the sensing error for data reading operation of PRAM. To avoid this sensing error, a 25 nm thick recording layer model of PRAM was subjected to simulation. The thin (25 nm) recording layer model shows higher cooling rate than the thick (100 nm) layer model. Therefore, the crystallization fraction of the thin layer model during RESET operation was decreased and the difference of electrical resistance between RESET and SET state of thin recording layer model was greater than the thick recording layer model.