IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Ultra High Speed CNFET Full-Adder Cell Based on Majority Gates
Keivan NAVIFazel SHARIFIAmir MOMENIPeiman KESHAVARZIAN
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2010 Volume E93.C Issue 6 Pages 932-934

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Abstract

In this paper an ultra high speed CNFET Full-Adder cell is presented. This design generates sum and carry-out signals via majority and majority-not gates which are implemented by CNFET buffer, CNFET inverter and input capacitors. Significant improvement in terms of speed and Power-Delay Product (PDP) is achieved.

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© 2010 The Institute of Electronics, Information and Communication Engineers
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